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dsPIC33F
DS70165E-page 152
Preliminary
2007 Microchip Technology Inc.
REGISTER 8-1:
OSCCON: OSCILLATOR CONTROL REGISTER
U-0
R-0
U-0
R/W-y
—COSC<2:0>
—NOSC<2:0>
bit 15
bit 8
R/W-0
U-0
R-0
U-0
R/C-0
U-0
R/W-0
CLKLOCK
—LOCK
—CF
—
LPOSCEN
OSWEN
bit 7
bit 0
Legend:
y = Value set from Configuration bits on POR
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 15
Unimplemented: Read as ‘0’
bit 14-12
COSC<2:0>: Current Oscillator Selection bits (read-only)
000
= Fast RC oscillator (FRC)
001
= Fast RC oscillator (FRC) with PLL
010
= Primary oscillator (XT, HS, EC)
011
= Primary oscillator (XT, HS, EC) with PLL
100
= Secondary oscillator (SOSC)
101
= Low-Power RC oscillator (LPRC)
110
= Fast RC oscillator (FRC) with Divide-by-16
111
= Fast RC oscillator (FRC) with Divide-by-n
bit 11
Unimplemented: Read as ‘0’
bit 10-8
NOSC<2:0>: New Oscillator Selection bits
000
= Fast RC oscillator (FRC)
001
= Fast RC oscillator (FRC) with PLL
010
= Primary oscillator (XT, HS, EC)
011
= Primary oscillator (XT, HS, EC) with PLL
100
= Secondary oscillator (SOSC)
101
= Low-Power RC oscillator (LPRC)
110
= Fast RC oscillator (FRC) with Divide-by-16
111
= Fast RC oscillator (FRC) with Divide-by-n
bit 7
CLKLOCK: Clock Lock Enable bit
1
= If (FCKSM1 = 1), then clock and PLL configurations are locked.
If (FCKSM1 = 0), then clock and PLL configurations may be modified.
0
= Clock and PLL selections are not locked, configurations may be modified
bit 6
Unimplemented: Read as ‘0’
bit 5
LOCK: PLL Lock Status bit (read-only)
1
= Indicates that PLL is in lock, or PLL start-up timer is satisfied
0
= Indicates that PLL is out of lock, start-up timer is in progress or PLL is disabled
bit 4
Unimplemented: Read as ‘0’
bit 3
CF: Clock Fail Detect bit (read/clear by application)
1
= FSCM has detected clock failure
0
= FSCM has not detected clock failure
bit 2
Unimplemented: Read as ‘0’
bit 1
LPOSCEN: Secondary (LP) Oscillator Enable bit
1
= Enable secondary oscillator
0
= Disable secondary oscillator
bit 0
OSWEN: Oscillator Switch Enable bit
1
= Request oscillator switch to selection specified by NOSC<2:0> bits
0
= Oscillator switch is complete
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